JPH0127589B2 - - Google Patents

Info

Publication number
JPH0127589B2
JPH0127589B2 JP53147605A JP14760578A JPH0127589B2 JP H0127589 B2 JPH0127589 B2 JP H0127589B2 JP 53147605 A JP53147605 A JP 53147605A JP 14760578 A JP14760578 A JP 14760578A JP H0127589 B2 JPH0127589 B2 JP H0127589B2
Authority
JP
Japan
Prior art keywords
polycrystalline silicon
contact hole
gate electrode
source
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53147605A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5574175A (en
Inventor
Ikuo Kawamata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14760578A priority Critical patent/JPS5574175A/ja
Publication of JPS5574175A publication Critical patent/JPS5574175A/ja
Publication of JPH0127589B2 publication Critical patent/JPH0127589B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
JP14760578A 1978-11-29 1978-11-29 Preparing interpolation type mos semiconductor device Granted JPS5574175A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14760578A JPS5574175A (en) 1978-11-29 1978-11-29 Preparing interpolation type mos semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14760578A JPS5574175A (en) 1978-11-29 1978-11-29 Preparing interpolation type mos semiconductor device

Publications (2)

Publication Number Publication Date
JPS5574175A JPS5574175A (en) 1980-06-04
JPH0127589B2 true JPH0127589B2 (en]) 1989-05-30

Family

ID=15434100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14760578A Granted JPS5574175A (en) 1978-11-29 1978-11-29 Preparing interpolation type mos semiconductor device

Country Status (1)

Country Link
JP (1) JPS5574175A (en])

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5785226A (en) * 1980-11-18 1982-05-27 Seiko Epson Corp Manufacture of semiconductor device
JPS5810856A (ja) * 1981-07-10 1983-01-21 Nec Corp 相補型半導体集積回路装置の製造方法
JPS5821858A (ja) * 1981-07-31 1983-02-08 Nec Corp 半導体装置の製造方法
JPS5885559A (ja) * 1981-11-18 1983-05-21 Nec Corp Cmos型半導体集積回路装置
KR930009127B1 (ko) * 1991-02-25 1993-09-23 삼성전자 주식회사 스택형캐패시터를구비하는반도체메모리장치

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51116675A (en) * 1975-04-05 1976-10-14 Fujitsu Ltd Manufacturing method for a semiconductor device
JPS51134566A (en) * 1975-05-17 1976-11-22 Fujitsu Ltd Semiconductor unit manufacturing process
JPS51137384A (en) * 1975-05-23 1976-11-27 Nippon Telegr & Teleph Corp <Ntt> Semi conductor device manufacturing method

Also Published As

Publication number Publication date
JPS5574175A (en) 1980-06-04

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